Design and Experimental Validation of an Embedded Sliding Mode Controller for Voltage Regulation With SEPIC Converters
dc.contributor.author | Rinaldi, G | |
dc.contributor.author | Menon, PP | |
dc.contributor.author | Ferrara, A | |
dc.date.accessioned | 2024-06-24T11:52:36Z | |
dc.date.issued | 2024-06-19 | |
dc.date.updated | 2024-06-21T09:04:11Z | |
dc.description.abstract | This paper addresses the challenge of regulating the output voltage in single-end primary inductor converters (SEPICs) and introduces a practical solution based on the generation of second-order suboptimal sliding modes (2-SOSM). In contrast to the common assumption of a lossless SEPIC, in this paper, a lossy SEPIC is explored. A concise mathematical representation of its model is presented, and the equilibrium point is explicitly defined. Using only the output voltage as a measurement, it is proven that the proposed 2-SOSM strategy achieves finite-time convergence of the output voltage with its reference. The proposed method effectively handles saturation constraints on the control variable, ensuring that the SEPIC duty ratio remains between 0 and 1. Furthermore, the approach proves to be robust to variations in the load resistor. The experimental analysis validates the effectiveness of our proposal and highlights its practical benefits. A comparison with a standard proportional integral control (PI) on an embedded platform underscores the superiority of the adopted approach. | en_GB |
dc.description.sponsorship | Innovate UK | en_GB |
dc.identifier.citation | Published online 19 June 2024 | en_GB |
dc.identifier.doi | https://doi.org/10.1109/tpel.2024.3415164 | |
dc.identifier.grantnumber | 10005693 TS/W012197/1 | en_GB |
dc.identifier.uri | http://hdl.handle.net/10871/136407 | |
dc.identifier | ORCID: 0000-0003-2021-5458 (Rinaldi, Gianmario) | |
dc.identifier | ORCID: 0000-0003-3804-9291 (Menon, Prathyush P) | |
dc.language.iso | en | en_GB |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_GB |
dc.rights | © 2024 IEEE. For the purpose of open access, the author has applied a Creative Commons Attribution (CC BY) licence to any Author Accepted Manuscript version arising from this submission. | en_GB |
dc.title | Design and Experimental Validation of an Embedded Sliding Mode Controller for Voltage Regulation With SEPIC Converters | en_GB |
dc.type | Article | en_GB |
dc.date.available | 2024-06-24T11:52:36Z | |
dc.identifier.issn | 0885-8993 | |
dc.description | This is the author accepted manuscript. The final version is available from IEEE via the DOI in this record | en_GB |
dc.identifier.eissn | 1941-0107 | |
dc.identifier.journal | IEEE Transactions on Power Electronics | en_GB |
dc.rights.uri | https://creativecommons.org/licenses/by/4.0/ | en_GB |
rioxxterms.version | AM | en_GB |
rioxxterms.licenseref.startdate | 2024-06-19 | |
rioxxterms.type | Journal Article/Review | en_GB |
refterms.dateFCD | 2024-06-24T11:50:01Z | |
refterms.versionFCD | AM | |
refterms.dateFOA | 2024-06-24T11:52:43Z | |
refterms.panel | B | en_GB |
exeter.rights-retention-statement | Yes |
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Except where otherwise noted, this item's licence is described as © 2024 IEEE. For the purpose of open access, the author has applied a Creative Commons Attribution (CC BY) licence to any Author Accepted Manuscript version arising from this submission.