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dc.contributor.authorGibson, Mike
dc.contributor.authorKeedwell, Edward
dc.contributor.authorSavic, Dragan
dc.date.accessioned2015-04-02T11:44:25Z
dc.date.issued2014-11-15
dc.description.abstractCellular automata (CA) have proven to be excellent tools for the simulation of a wide variety of phenomena in the natural world. They are ideal candidates for acceleration with modern general purpose-graphical processing units (GPU/GPGPU) hardware that consists of large numbers of small, tightly-coupled processors. In this study the potential for speeding up CA execution using multi-core CPUs and GPUs is investigated and the scalability of doing so with respect to standard CA parameters such as lattice and neighbourhood sizes, number of states and generations is determined. Additionally the impact of ‘Activity’ (the number of ‘alive’ cells) within a given CA simulation is investigated in terms of both varying the random initial distribution levels of ‘alive’ cells, and via the use of novel state transition rules; where a change in the dynamics of these rules (i.e. the number of states) allows for the investigation of the variable complexity within.en_GB
dc.description.sponsorshipEngineering and Physical Sciences Research Council (EPSRC)en_GB
dc.identifier.citationVol. 77, pp. 11-25en_GB
dc.identifier.doi10.1016/j.jpdc.2014.10.011
dc.identifier.grantnumberEP/H015736/1en_GB
dc.identifier.urihttp://hdl.handle.net/10871/16664
dc.language.isoenen_GB
dc.publisherElsevieren_GB
dc.subjectCellular automata (CA)en_GB
dc.subjectGeneral purpose graphic processing unit (GPGPU)en_GB
dc.subjectOpenCLen_GB
dc.subjectSingle Instruction Multiple Data (SIMD)en_GB
dc.subjectSingle Instruction Multiple Thread (SIMT)en_GB
dc.subjectOpenMPen_GB
dc.titleAn investigation of the efficient implementation of Cellular Automata on multi-core CPU and GPU hardwareen_GB
dc.typeArticleen_GB
dc.date.available2015-04-02T11:44:25Z
dc.identifier.issn0743-7315
dc.descriptionCopyright © 2015 Elsevier. NOTICE: this is the author’s version of a work that was accepted for publication in Journal of Parallel and Distributed Computing . Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Journal of Parallel and Distributed Computing Vol. 77 (2015), DOI: 10.1016/j.jpdc.2014.10.011en_GB
dc.identifier.journalJournal of Parallel and Distributed Computingen_GB


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