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dc.contributor.authorNagareddy, VK
dc.contributor.authorBarnes, MD
dc.contributor.authorZipoli, F
dc.contributor.authorLai, KT
dc.contributor.authorAlexeev, AM
dc.contributor.authorCraciun, MF
dc.contributor.authorWright, CD
dc.date.accessioned2017-04-03T09:30:32Z
dc.date.issued2017-02-27
dc.description.abstractGraphene oxide (GO) resistive memories offer the promise of low-cost environmentally sustainable fabrication, high mechanical flexibility and high optical transparency, making them ideally suited to future flexible and transparent electronics applications. However, the dimensional and temporal scalability of GO memories, i.e., how small they can be made and how fast they can be switched, is an area that has received scant attention. Moreover, a plethora of GO resistive switching characteristics and mechanisms has been reported in the literature, sometimes leading to a confusing and conflicting picture. Consequently, the potential for graphene oxide to deliver high-performance memories operating on nanometer length and nanosecond time scales is currently unknown. Here we address such shortcomings, presenting not only the smallest (50 nm), fastest (sub-5 ns), thinnest (8 nm) GO-based memory devices produced to date, but also demonstrate that our approach provides easily accessible multilevel (4-level, 2-bit per cell) storage capabilities along with excellent endurance and retention performance-all on both rigid and flexible substrates. Via comprehensive experimental characterizations backed-up by detailed atomistic simulations, we also show that the resistive switching mechanism in our Pt/GO/Ti/Pt devices is driven by redox reactions in the interfacial region between the top (Ti) electrode and the GO layer.en_GB
dc.description.sponsorshipThis work was carried out under the auspices of the EU FP7 project CareRAMM. This project received funding from the European Union Seventh Framework Programme (FP7/2007- 2013) under grant agreement no. 309980. The authors are grateful for helpful discussions with all CareRAMM partners, particularly Prof. Andrea Ferrari and Ms. Anna Ott at the University of Cambridge, and Drs. Abu Sebastian and Wabe Koelmans at IBM Research Zurich. We also gratefully acknowledge the assistance of the National EPSRC XPS User’s Service (NEXUS) at Newcastle University, U.K. (an EPSRC Mid-Range Facility) in carrying out the XPS measurementsen_GB
dc.identifier.citationACS Nano, 2017, 11 (3), pp 3010–3021en_GB
dc.identifier.doi10.1021/acsnano.6b08668
dc.identifier.urihttp://hdl.handle.net/10871/26924
dc.language.isoenen_GB
dc.publisherAmerican Chemical Societyen_GB
dc.relation.urlhttps://www.ncbi.nlm.nih.gov/pubmed/28221755en_GB
dc.subjectflexible memoryen_GB
dc.subjectgraphene oxideen_GB
dc.subjectmultilevel memoryen_GB
dc.subjectnonvolatile memoryen_GB
dc.subjectresistive switchingen_GB
dc.subjecttitanium oxideen_GB
dc.titleMultilevel ultrafast flexible nanoscale nonvolatile hybrid graphene oxide-titanium oxide memoriesen_GB
dc.typeArticleen_GB
dc.date.available2017-04-03T09:30:32Z
dc.identifier.issn1936-0851
exeter.place-of-publicationUnited Statesen_GB
dc.descriptionThis is the author accepted manuscript. The final version is available from the publisher via the DOI in this record.en_GB
dc.identifier.journalACS Nanoen_GB
dc.identifier.pmid28221755


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