Side-gate leakage and field emission in all-graphene field effect transistors on SiO2/Si substrate
dc.contributor.author | Di Bartolomeo, Antonio | |
dc.contributor.author | Giubileo, Filippo | |
dc.contributor.author | Iemmo, Laura | |
dc.contributor.author | Romeo, Francesco | |
dc.contributor.author | Russo, Saverio | |
dc.contributor.author | Unal, Selim | |
dc.contributor.author | Passacantando, Maurizio | |
dc.contributor.author | Grossi, Valentina | |
dc.contributor.author | Cucolo, Anna Maria | |
dc.date.accessioned | 2016-02-25T15:04:54Z | |
dc.date.issued | 2016 | |
dc.description.abstract | We fabricate planar all-graphene field-effect transistors with self-aligned side-gates at 100 nm from the main graphene conductive channel, using a single lithographic step. We demonstrate side-gating below 1V with conductance modulation of 35% and transconductance up to 0.5 mS/mm at 10 mV drain bias. We measure the planar leakage along the SiO2/vacuum gate dielectric over a wide voltage range, reporting rapidly growing current above 15 V. We unveil the microscopic mechanisms driving the leakage, as Frenkel-Poole transport through SiO2 up to the activation of Fowler-Nordheim tunneling in vacuum, which becomes dominant at high voltages. We report a field-emission current density as high as 1uA/um between graphene flakes. These findings are essential for the miniaturization of atomically thin devices. | en_GB |
dc.identifier.uri | http://hdl.handle.net/10871/20130 | |
dc.language.iso | en | en_GB |
dc.publisher | arXiv.org | en_GB |
dc.relation.url | http://arxiv.org/abs/1601.04476v2 | en_GB |
dc.title | Side-gate leakage and field emission in all-graphene field effect transistors on SiO2/Si substrate | en_GB |
dc.type | Article | en_GB |
dc.date.available | 2016-02-25T15:04:54Z | |
dc.identifier.journal | arXiv | en_GB |