dc.contributor.author | Schreiber, M | |
dc.contributor.author | Weinzierl, T | |
dc.date.accessioned | 2018-01-22T15:59:28Z | |
dc.date.issued | 2018-01-23 | |
dc.description.abstract | We study codes deploying multiple MPI ranks to one node where each rank is parallelised with TBB. A static assignment of cores to ranks here is disadvantageous if the load is not perfectly balanced, the runtime is subject to fluctuations or one MPI rank runs through phases with low concurrency. We propose an extension to TBB where developers manually annotate which code parts could exploit further cores. The cores are then dynamically associated with ranks. Our approach is decentralised, lightweight and minimally invasive w.r.t. code modifications. Some brief performance studies suggest that a flexible, permanently changing assignment of cores to compute ranks can outperform a static distribution, while greedily haggling over cores throughout a simulation might perform even better. | en_GB |
dc.description.sponsorship | The authors appreciate support received from the European Union’s
Horizon 2020 research and innovation programme under grant
agreement No 671698 (ExaHyPE). Thanks are due to all members
of the ExaHyPE consortium who made this research possible, notably
Dominic E. Charrier and Benjamin Hazelwood. This work
made use of the facilities of the Hamilton HPC Service of Durham
University. Both authors appreciate former funding through the
Transregional Collaborative Research Centre 89—Invasive Computing
(DFG funded).
REFERENCE | en_GB |
dc.identifier.citation | Proceedings of the 3rd Workshop on Co-Scheduling of HPC Applications (COSH 2018) , pp. 21-26. | en_GB |
dc.identifier.doi | 10.14459/2018md1428538 | |
dc.identifier.uri | http://hdl.handle.net/10871/31155 | |
dc.language.iso | en | en_GB |
dc.publisher | Association for Computing Machinery (ACM) | en_GB |
dc.rights | © 2018 Copyright held by the authors. Published in the TUM library. | |
dc.subject | MPI+X load balancing | en_GB |
dc.subject | Invasive computing | en_GB |
dc.subject | Compute balancing | en_GB |
dc.subject | Dynamic resource scheduling | en_GB |
dc.title | A case study for a new invasive extension of Intel’s threading building blocks | en_GB |
dc.type | Conference paper | en_GB |
dc.description | 3rd COSH Workshop on Co-Scheduling of HPC Applications, 23 January 2018, Manchester, UK | en_GB |
dc.description | This is the author accepted manuscript. The final version is available from mediaTUM via the DOI in this record. | en_GB |