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dc.contributor.authorMukherjee, A
dc.contributor.authorPakhira, A
dc.contributor.authorDas, S
dc.contributor.authorPan, I
dc.contributor.authorGupta, A
dc.date.accessioned2018-01-18T14:54:59Z
dc.date.issued2011-08-12
dc.description.abstractThe paper presents a Stateflow based network test-bed to validate real-time optimal control algorithms. Genetic Algorithm (GA) based time domain performance index minimization is attempted for tuning of PI controller to handle a balanced lag and delay type First Order Plus Time Delay (FOPTD) process over network. The tuning performance is validated on a real-time communication network with artificially simulated stochastic delay, packet loss and out-of order packets characterizing the network.en_GB
dc.description.sponsorshipThis work has been supported by the Board of Research in Nuclear Sciences (BRNS) of the Department of Atomic Energy (DAE), India, sanction no. 2009/36/62-BRNS, dated November 2009.en_GB
dc.identifier.citation2011 International Conference on Process Automation, Control and Computing (PACC), Coimbatore, India, 20-22 July 2011, article 5979045en_GB
dc.identifier.doi10.1109/PACC.2011.5979045
dc.identifier.urihttp://hdl.handle.net/10871/31072
dc.language.isoenen_GB
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en_GB
dc.rights© 2011 IEEEen_GB
dc.subjectDelayen_GB
dc.subjectReal time systemsen_GB
dc.subjectMathematical modelen_GB
dc.subjectStochastic processesen_GB
dc.subjectOut of orderen_GB
dc.subjectTuningen_GB
dc.subjectSynchronizationen_GB
dc.titleEmbedded Network Test-Bed for Validating Real-Time Control Algorithms to Ensure Optimal Time Domain Performanceen_GB
dc.typeConference paperen_GB
dc.date.available2018-01-18T14:54:59Z
dc.descriptionThis is the author accepted manuscript. The final version is available from IEEE via the DOI in this record.en_GB


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